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The writing/reading operation is based on the I C slave standard.
BD6083GUL
● I 2 C BUS Format
2
? Slave address
A7 A6 A5 A4 A3 A2 A1
R/W
Datasheet
1
1
1
0
1
1
0
1/0
? Bit Transfer
SCL transfers 1-bit data during H. SCL cannot change signal of SDA during H at the time of bit transfer. If SDA changes
while SCL is H, START conditions or STOP conditions will occur and it will be interpreted as a control signal.
SDA
SCL
SDA a state of stability ：
Data are effective
SDA
It can change
Figure 1.
? START and STOP condition
When SDA and SCL are H, data is not transferred on the I 2 C- bus. This condition indicates, if SDA changes from H to L
while SCL has been H, it will become START (S) conditions, and an access start, if SDA changes from L to H while SCL
has been H, it will become STOP (P) conditions and an access end.
SDA
SCL
S
START condition
P
STOP condition
Figure 2.
? Acknowledge
It transfers data 8 bits each after the occurrence of START condition. A transmitter opens SDA after transfer 8bits data,
and a receiver returns the acknowledge signal by setting SDA to L.
DATA OUTPUT
BY TRANSMITTER
not acknowledge
DATA OUTPUT
BY RECEIVER
acknowledge
SCL
S
1
2
8
9
START condition
clock pulse for
acknowledgement
Figure 3.
? Writing protocol
A register address is transferred by the next 1 byte that transferred the slave address and the write-in command. The 3rd
byte writes data in the internal register written in by the 2nd byte, and after 4th byte or, the increment of register address
is carried out automatically. However, when a register address turns into the last address, it is set to 00h by the next
transmission. After the transmission end, the increment of the address is carried out.
S X X X X X X X 0 A A7 A6 A5 A4 A3 A2 A1 A0 A D7 D6 D5 D4 D3 D2 D1 D0 A
*1
*1
D7 D6 D5 D4 D3 D2 D1 D0 A P
slave address
R/W=0(write)
register address
DATA
register address
increment
DATA
register address
increment
from master to slave
from slave to master
A=acknowledge(SDA LOW)
A=not acknowledge(SDA HIGH)
S=START condition
P=STOP condition
*1: Write Timing
Figure 4.
www.rohm.com
? 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111 ? 15 ? 001
9/42
TSZ02201-0G3G0C200100-1-2
05.Oct.2012 Rev.001
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